WCET-Aware Dynamic I-Cache Locking for a Single Task

WCET-driven Cache-aware Memory Content Selection1

Caches are widely used to bridge the increasingly growing gap between processor and memory performance. They store copies of frequently used parts of the slow main memory for faster access. Static analysis techniques allow the estimation of the worstcase cache behavior and enable the computation of an upper bound of the execution time of a program. This bound is called worst-case execution time...

WCET-aware Software Based Cache Partitioning for Multi-Task Real-Time Systems

Caches are a source of unpredictability since it is very difficult to predict if a memory access results in a cache hit or miss. In systems running multiple tasks steered by a preempting scheduler, it is even impossible to determine the cache behavior since interrupt-driven schedulers lead to unknown points of time for context switches. Partitioned caches are already used in multi-task environm...

CAMA - Cache-Aware Memory Allocation for WCET Analysis

Current WCET analyses do not support dynamic memory allocation. This is mainly due to the unpredictability of the cache performance if standard memory allocators are used. We present a novel dynamic memory allocator that makes cache performance predictable and (de)allocates memory in constant time. It thereby enables WCET analysis in the presence of dynamic memory allocation.

A Power Aware Cache and Register File Design Space Exploration

Combining Instruction Prefetching with Partial Cache Locking to Improve WCET in Real-Time Systems

Caches play an important role in embedded systems to bridge the performance gap between fast processor and slow memory. And prefetching mechanisms are proposed to further improve the cache performance. While in real-time systems, the application of caches complicates the Worst-Case Execution Time (WCET) analysis due to its unpredictable behavior. Modern embedded processors often equip locking m...